2025

1. Methods and Design for Analog Computing Architectures: Memristors for Enhancing Expressiveness and Energy-Efficiency of Packet Processors (Saad Saleh), University of Groningen, 2025.

   Abstract

   The Internet heavily relies on packet processors for establishing the communication links between senders and receivers of network traffic. Despite their promising performance, the current generation of packet processors consume a huge amount of energy and provide limited support for more expressive functions like brain-inspired cognitive computing models. The major reason is the underlying transistor-based technology, which builds on digital computations and requires energy intensive data movements between storage and computational units inside these components. In this research, we show that the recent emerging technologies from the analog domain, especially Memristors, have a huge potential for increasing energy efficiency and supporting cognitive functions in packet processors.This thesis proposes an analog architecture for packet processors in order to support energy-efficient and cognitive functions in computer networks. Central to this design is a novel analog memory abstraction called Probabilistic Content Addressable Memory (pCAM). It provides both digital and analog outputs for supporting more expressive functions in packet processors. In order to support traditional digital operations, we propose a novel memristor-based TCAM memory. Building on analog computations, we further propose a congestion control mechanism, called derivative-based active queue management (dAQM), for better management of network traffic. The performance of the proposed analog architecture was analyzed over a physically fabricated Nb doped SrTiO3 memristor chip. The results showed that analog processing consumes up to 50 times less energy than digital processing. Moreover, the analog dAQM function provides up to 39.7% better performance than the state-of-the-art algorithms.

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   BibTeX

   
   @PhdThesis{Saleh25PhDdissertation, author = {Saad Saleh}, school = {University of Groningen}, title = {{Methods and Design for Analog Computing Architectures: Memristors for Enhancing Expressiveness and Energy-Efficiency of Packet Processors}}, year = {2025}, abstract = {The Internet heavily relies on packet processors for establishing the communication links between senders and receivers of network traffic. Despite their promising performance, the current generation of packet processors consume a huge amount of energy and provide limited support for more expressive functions like brain-inspired cognitive computing models. The major reason is the underlying transistor-based technology, which builds on digital computations and requires energy intensive data movements between storage and computational units inside these components. In this research, we show that the recent emerging technologies from the analog domain, especially Memristors, have a huge potential for increasing energy efficiency and supporting cognitive functions in packet processors.This thesis proposes an analog architecture for packet processors in order to support energy-efficient and cognitive functions in computer networks. Central to this design is a novel analog memory abstraction called Probabilistic Content Addressable Memory (pCAM). It provides both digital and analog outputs for supporting more expressive functions in packet processors. In order to support traditional digital operations, we propose a novel memristor-based TCAM memory. Building on analog computations, we further propose a congestion control mechanism, called derivative-based active queue management (dAQM), for better management of network traffic. The performance of the proposed analog architecture was analyzed over a physically fabricated Nb doped SrTiO3 memristor chip. The results showed that analog processing consumes up to 50 times less energy than digital processing. Moreover, the analog dAQM function provides up to 39.7% better performance than the state-of-the-art algorithms.}, doi = {10.33612/diss.1157857827}, language = {English}, pages = {212}, publisher = {University of Groningen}, }

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   doi
2. Modulating trapping in low dimensional lead-tin halides for energy-efficient neuromorphic electronics (L. Chen, S. Saleh, F. Tavormina, L. Mario, J. Li, Z. Xie, N. Masciocchi, C. Brabec, B. Koldehofe and M. A. Loi), In Advanced Materials, Wiley-VCH, 2025.

   BibTeX

   
   @Article{saleh2025:advancedmaterials, title = {Modulating trapping in low dimensional lead-tin halides for energy-efficient neuromorphic electronics}, author = {L. Chen and S. Saleh and F. Tavormina and L. Mario and J. Li and Z. Xie and N. Masciocchi and C. Brabec and B. Koldehofe and M. A. Loi}, journal = {Advanced Materials}, publisher = {Wiley-VCH}, year = {2025}, month = {mar}, day = {}, volumeX = {}, pages = {}, language = {English}, doi = {}, url = {}, }

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   urldoi
3. Managing and Anticipating Out-of-Order Events in Online Compliance Monitoring (S. Colombo Tosatto, H. Burke, N.R.T.P. van Beest and H. Groefsema), In 37th International Conference on Advanced Information Systems Engineering, CAiSE 2025, Springer, 2025.

   Abstract

   When monitoring compliance of event streams at runtime, it is usually assumed that the events are received in the order in which they are produced. However, in reality, event data is typically transmitted from distributed sources and may be received out-of-order as a result. This is problematic for the compliance analysis in terms of accuracy, latency and computational efficiency. In this paper, we present an approach to manage these problems by exploiting knowledge of the event sources to identify the reliable prefix of the event stream that is guaranteed to be in order, allowing a reliable analysis on that prefix. Subsequently, we use the prefix alignment of the observed event stream and a process model to quantify its reliability and identify events that might arrive out-of-order, allowing to calculate a confidence score of compliance results. This improves efficiency and provides compliance results with awareness of potential uncertainty, enabling decision makers to respond appropriately to the identified issues.

   
   Keywords: Out-of-Order Event Streams, Process Models, Online Monitoring, Compliance, Conformance, Alignments

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   BibTeX

   
   @inproceedings{Groefsema2025:caise, title = {Managing and Anticipating Out-of-Order Events in Online Compliance Monitoring}, abstract = {When monitoring compliance of event streams at runtime, it is usually assumed that the events are received in the order in which they are produced. However, in reality, event data is typically transmitted from distributed sources and may be received out-of-order as a result. This is problematic for the compliance analysis in terms of accuracy, latency and computational efficiency. In this paper, we present an approach to manage these problems by exploiting knowledge of the event sources to identify the reliable prefix of the event stream that is guaranteed to be in order, allowing a reliable analysis on that prefix. Subsequently, we use the prefix alignment of the observed event stream and a process model to quantify its reliability and identify events that might arrive out-of-order, allowing to calculate a confidence score of compliance results. This improves efficiency and provides compliance results with awareness of potential uncertainty, enabling decision makers to respond appropriately to the identified issues.}, keywords = {Out-of-Order Event Streams, Process Models, Online Monitoring, Compliance, Conformance, Alignments}, author = {S. {Colombo Tosatto} and H. Burke and N.R.T.P. {van Beest} and H. Groefsema}, year = {2025}, month = feb, day = {28}, series = {Lecture Notes in Computer Science}, publisher = {Springer}, booktitle = {37th International Conference on Advanced Information Systems Engineering, CAiSE 2025}, }

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