Publications of Boris Koldehofe
Recent Publications
- Poster: Towards Federated LLM-Powered CEP Rule Generation and Refinement (), In Proceedings of the 18th ACM International Conference on Distributed and Event-Based Systems (DEBS'24), ACM, 2024.
Abstract
In traditional event processing systems, patterns representing situations of interest are typically defined by domain experts or learned from historical data. These approaches often make rule generation reactive, time-consuming, and susceptible to human error. In this paper, we propose and investigate the integration of large language models (LLMs) to automate and accelerate query translation and rule generation in event processing systems. Furthermore, we introduce a federated learning schema to refine the initially generated rules by examining them over distributed event streams, ensuring greater accuracy and adaptability. Preliminary results demonstrate the potential of LLMs as a key component in proactively expediting the autonomous rule-generation process. Moreover, our findings suggest that employing customized prompt engineering techniques can further enhance the quality of the generated rules.
BibTeX
url - Driving Towards Efficiency: Adaptive Resource-aware Clustered Federated Learning in Vehicular Networks (), In Proceedings of the 22nd Mediterranean Communication and Computer Networking Conference (MedComNet’24)., IEEE, 2024.
Abstract
Guaranteeing precise perception for fully autonomous driving in diverse driving conditions requires continuous improvement and training. In vehicular networks, federated learning (FL) facilitates this by enabling model training without sharing raw sensory data. As an extension, clustered FL reduces communication overhead and aligns well with the dynamic nature of these networks. However, current literature on this topic does not consider critical dimensions of FL, including (1) the correlation between perception performance and the networking overhead, (2) the limited vehicle storage, (3) the need for training with freshly captured data, and (4) the impact of non-IID data and varying traffic densities. To fill these research gaps, we introduce AR-CFL, an Adaptive Resource-aware Clustered Federated Learning framework. AR-CFL utilizes clustered FL to collectively model the environment of connected vehicles, integrating models from all vehicles and ensuring universal accessibility to the refined model. AR-CFL dynamically enhances system efficiency by adaptively adjusting the number of clusters and specific in-cluster participant selection strategies. Using AR-CFL, we systematically study the scenario of online car detection model training on non-IID data across varied conditions. The evaluation results highlight the robust detection performance exhibited by the trained model employing the clustered FL approach, despite the constraints posed by limited vehicle storage capacity. Furthermore, our investigation unveils superior training performance with clustered FL in comparison to specific classical FL scenarios, increasing the training efficiency in terms of participating nodes by up to 25% and reducing cellular communication by 33%.
BibTeX
url - In-Network Management of Parallel Data Streams over Programmable Data Planes (), In Proceedings of the 23rd International Federation for Information Processing Networking Conference (IFIP NETWORKING 2024), IEEE, 2024.
- Analog In-Network Computing through Memristor-based Match-Compute Processing (), In Proceedings of the 43rd International Conference on Computer Communications (INFOCOM 2024), IEEE, 2024.
- dAQM: Derivative-based Active Queue Management (), In Proceedings of the 23rd IFIP Networking Conference (NETWORKING 2024), IFIP, 2024.
- Adaptive In-Network Queue Management using Derivatives of Sojourn Time and Buffer Size (), In Proceedings of the 37th Network Operations and Management Symposium (NOMS 2024), IEEE, 2024.
- APP-CEP: Adaptive Pattern-level Privacy Protection in Complex Event Processing Systems (), In The 10th International Conference on Information Systems Security and Privacy (ICISSP 2024)., SCITEPRESS, 2024.
Abstract
Although privacy-preserving mechanisms endeavor to safeguard sensitive information at the attribute level, detected event patterns can still disclose privacy-sensitive knowledge in distributed complex event processing systems (DCEP). Events might not be inherently sensitive, but their aggregation into a pattern could still breach privacy. In this paper, we study in the context of APP-CEP the problem of integrating pattern-level privacy in event-based systems by selective assignment of obfuscation techniques to conceal private information. Compared to state-of-the-art techniques, we seek to enforce privacy independent of the actual events in streams. To support this, we acquire queries and privacy requirements using CEP-like patterns. The protection of privacy is accomplished through generating pattern dependency graphs, leading to dynamically appointing those techniques that have no consequences on detecting other sensitive patterns, as well as non-sensitive patterns required to provide acceptable Quality of Service. Besides, we model the knowledge that might be possessed by potential adversaries to violate privacy and its impacts on the obfuscation procedure. We assessed the performance of APP-CEP in a real-world scenario involving an online retailer’s transactions. Our evaluation results demonstrate that APP-CEP successfully provides a privacy-utility trade-off. Modeling the background knowledge also effectively prevents adversaries from realizing the modifications in the input streams.
BibTeX
url - Beyond Digital! Memristor-based Energy Efficient Analog Network Functions (), In ICT.OPEN - CompSys Research for a Responsibly Digitalised Society, NWO ICT.OPEN, 2024.
- Towards Analog In-Network Computing for Supporting Cognitive and Energy-Efficient Network Functions (), In 6th International Conference on Applications of Intelligent Systems (APPIS 2024), University of Las Palmas de Gran Canaria, Spain, 2024.
- Memristor-based Network Switching Architecture for Energy Efficient Cognitive Computational Models (), In Proceedings of the 18th International Symposium on Nanoscale Architectures (NanoArch 2023), ACM, 2023.
Abstract
The Internet makes use of high performance network switches in order to route network traffic from end users to servers. Despite line-rate performance, the current switches consume huge energy and cannot support more expressive learning models, like cognitive functions using neuromorphic computations. The major reason is the use of transistors in the underlying Ternary Content-Addressable Memory (TCAM) which is volatile and supports digital computations only. These shortcomings can be bypassed by developing network memories building on novel components, like Memristors, due to their nonvolatile, nanoscale and analog storage/processing characteristics. In this paper, we propose the use of a novel memristor-based Probabilistic Associative Memory, PAmM, which provides both digital (deterministic) and analog (probabilistic) outputs for supporting cognitive computational models in network switches. The traditional digital operations can be supported by a memristor-based energy efficient TCAM, called TCAmMCogniGron. Building on PAmM and TCAmMCogniGron, we propose a novel network switching architecture and analyze its energy efficiency over the experimental dataset of a Nb-doped SrTiO3 memristive device. The results show that the proposed network switching architecture consumes only 0.01 fJ/bit/cell energy for analog compute operations which is at least 50 times less than the digital operations.
BibTeX
urldoi - The Future is Analog: Energy-Efficient Cognitive Network Functions over Memristor-Based Analog Computations (), In Proceedings of the 22nd ACM SIGCOMM Workshop on Hot Topics in Networks (HotNets 2023), ACM, 2023.
Abstract
Current network functions build heavily on fixed programmed rules and lack capacity to support more expressive learning models, e.g. brain-inspired Cognitive computational models using neuromorphic computations. The major reason for this shortcoming is the huge energy consumption and limitation in expressiveness by the underlying TCAM-based digital packet processors. In this research, we show that recent emerging technologies from the analog domain have a high potential in supporting network functions with energy efficiency and more expressiveness, so called cognitive functions. We propose an analog packet processing architecture building on a novel technology named Memristors. We develop a novel analog match-action memory called Probabilistic Content-Addressable Memory (pCAM) for supporting deterministic and probabilistic match functions. We develop the programming abstractions and show the support of pCAM for an active queue management-based analog network function. The analysis over an experimental dataset of a memristor chip showed only 0.01 fJ/bit/cell of energy consumption for corresponding analog computations which is 50 times less than digital computations.
BibTeX
urldoi - PAmM: Memristor-based Probabilistic Associative Memory for Neuromorphic Network Functions (), In Proceedings of the Non-Volatile Memory Technology Symposium (NVMTS 2023), IEEE, 2023.
- Towards Pattern-Level Privacy Protection in Distributed Complex Event Processing (), In The 17th ACM International Conference on Distributed and Event-Based Systems (DEBS 2023), ACM press, 2023.
Abstract
In event processing systems, detected event patterns can reveal privacy-sensitive information. In this paper, we propose and discuss how to integrate pattern-level privacy protection in event-based systems. Compared to state-of-the-art approaches, we aim to enforce privacy independent of the particularities of specific operators. We accomplish this by supporting the flexible integration of multiple obfuscation techniques and studying deployment strategies for privacy-enforcing mechanisms. Moreover, we share ideas on how to model the adversary’s knowledge to better select appropriate obfuscation techniques for the discussed deployment strategies. Initial results indicate that flexibly choosing obfuscation techniques and deployment strategies is essential to conceal privacy-sensitive event patterns accurately.
BibTeX
url - AQuA-CEP: Adaptive Quality-Aware Complex Event Processing in the Internet of Things (), In Proceedings of the 17th ACM International Conference on Distributed and Event-Based Systems (DEBS 2023), ACM press, 2023.
Abstract
Sensory data profoundly influences the quality of detected events in a distributed complex event processing system (DCEP). Since each sensor’s status is unstable at runtime, a single sensing assignment is often insufficient to fulfill the consumer’s quality requirements. In this paper, we study in the context of AQuA-CEP the problem of dynamic quality monitoring and adaptation of complex event processing by active integration of suitable data sources. To support this, in AQuA-CEP, queries to detect complex events are supplemented with consumer-definable quality policies that are evaluated and used to autonomously select (or even configure) suitable data sources of the sensing infrastructure. In addition, we studied different forms of expressing quality policies and analyzed how it affects the quality monitoring process. Various modes of evaluating and applying quality-related adaptations and their impacts on correlation efficiency are addressed, too. We assessed the performance of AQuA-CEP in IoT scenarios by utilizing the notion of the quality policy alongside the query processing adaptation using knowledge derived from quality monitoring. The results show that AQuA-CEP can improve the performance of DCEP systems in terms of the quality of results while fulfilling the consumer’s quality requirements. Quality-based adaptation can also increase the network’s lifetime by optimizing the sensor’s energy consumption due to efficient data source selection.
BibTeX
url - Memristor-based Probabilistic Content Addressable Memory for Cognitive Network Functions (), In Neuromorphic Computing Netherlands (NCN 2023) Workshop [Posters], 2023.
- Memristor-based Cognitive and Energy-Efficient Analog In-network Computing (), In Neuromorphic Summer School [Posters], Kiel CRC Neurotronics and CogniGron, 2023.
- On Memristors for Enabling Energy Efficient and Enhanced Cognitive Network Functions (), In IEEE Access, IEEE, volume 10, 2022.
Abstract
The high performance requirements of nowadays computer networks are limiting their ability to support important requirements of the future. Two important properties essential in assuring cost-efficient computer networks and supporting new challenging network scenarios are operating energy efficient and supporting cognitive computational models. These requirements are hard to fulfill without challenging the current architecture behind network packet processing elements such as routers and switches. Notably, these are currently dominated by the use of traditional transistor-based components. In this article, we contribute with an in-depth analysis of alternative architectural design decisions to improve the energy footprint and computational capabilities of future network packet processors by shifting from transistor-based components to a novel component named Memristor . A memristor is a computational component characterized by non-volatile operations on a physical state, mostly represented in form of (electrical) resistance. Its state can be read or altered by input signals, e.g. electrical pulses, where the future state always depends on the past state. Unlike in traditional von Neumann architectures, the principles behind memristors impose that memory operations and computations are inherently colocated. In combination with the non-volatility, this allows to build memristors at nanoscale size and significantly reduce the energy consumption. At the same time, memristors appear to be highly suitable to model cognitive functionality due to the state dependence transitions in the memristor. In cognitive architectures, our survey contributes to the study of memristor-based Ternary Content Addressable Memory (TCAM) used for storage of cognitive rules inside packet processors. Moreover, we analyze the memristor-based novel cognitive computational architectures built upon self-learning capabilities by harnessing from non-volatility and state-based response of memristors (including reconfigurable architectures, reservoir computation architectures, neural network architectures and neuromorphic computing architectures).
BibTeX
urldoi - Network Testing Utilizing ProgrammableNetworking Hardware. (), In IEEE Communications Magazine, IEEE, 2022.
- Towards adaptive quality-aware Complex Event Processing in the Internet of Things (), In Proceedings of the 18th International Conference on Mobility, Sensing and Networking (MSN 2022), IEEE, 2022.
Abstract
This paper investigates how to complement Complex Event Processing (CEP) with dynamic quality monitoring mechanisms and support the dynamic integration of suitable sensory data sources. In the proposed approach, queries to detect complex events are annotated with consumer-definable quality policies that are evaluated and used to autonomously assign (or even configure) suitable data sources of the sensing infrastructure. We present and study different forms of expressing quality policies and explore how they affect the process of quality monitoring including different modes of assessing and applying quality-related adaptations. A performance study in an IoT scenario shows that the proposed mechanisms in supporting quality policy monitoring and adaptively selecting suitable data sources succeed in enhancing the acquired quality of results while fulfilling consumers' quality requirements. We show that the quality-based selection of sensor sources also extends the network's lifetime by optimizing the data sources' energy consumption.
BibTeX
urldoi - TCAmMCogniGron: Energy Efficient Memristor-Based TCAM for Match-Action Processing (), In Proceedings of the 7th International Conference on Rebooting Computing (ICRC 2022), IEEE, 2022.
Abstract
The Internet relies heavily on programmable match-action processors for matching network packets against locally available network rules and taking actions, such as forwarding and modification of network packets. This match-action process must be performed at high speed, i.e., commonly within one clock cycle, using a specialized memory unit called Ternary Content Addressable Memory (TCAM). Building on transistor-based CMOS designs, state-of-the-art TCAM architectures have high energy consumption and lack resilient designs for incorporating novel technologies for performing appropriate actions. In this article, we motivate the use of a novel fundamental component, the ‘Memristor’, for the development of TCAM architecture for match-action processing. Memristors can provide energy efficiency, non-volatility and better resource density as compared to transistors. We have proposed a novel memristor-based TCAM architecture called TCAmMCogniGron, built upon the voltage divider principle and requiring only two memristors and five transistors for storage and search operations compared to sixteen transistors in the traditional TCAM architecture. We analyzed its performance over an experimental data set of Nb-doped SrTiO3-based memristor. The analysis of TCAmMCogniGron showed promising power consumption statistics of 16 uW and 1 uW for match and mismatch operations along with twice the improvement in resources density as compared to the traditional architectures.
BibTeX
urldoi - Towards Energy Efficient Memristor-based TCAM for Match-Action Processing (), In Proceedings of the 13th International Green and Sustainable Computing Conference (IGSC 2022), IEEE, 2022.
Abstract
Match-action processors play a crucial role of communicating end-users in the Internet by computing network paths and enforcing administrator policies. The computation process uses a specialized memory called Ternary Content Addressable Memory (TCAM) to store processing rules and use header information of network packets to perform a match within a single clock cycle. Currently, TCAM memories consume huge amounts of energy resources due to the use of traditional transistor-based CMOS technology. In this article, we motivate the use of a novel component, the memristor, for the development of a TCAM architecture. Memristors can provide energy efficiency, non-volatility, and better resource density as compared to transistors. We have proposed a novel memristor-based TCAM architecture built upon the voltage divider principle for energy efficient match-action processing. Moreover, we have tested the performance of the memristor-based TCAM architecture using the experimental data of a novel Nb-doped SrTiO3 memristor. Energy analysis of the proposed TCAM architecture for given memristor shows promising power consumption statistics of 16 μW for a match operation and 1 μW for a mismatch operation.
BibTeX
urldoi - Window-based Parallel Operator Execution with In-Network Computing (), In Proceedings of the 16th ACM International Conference on Distributed and Event-Based Systems, ACM, 2022.
- On the Incremental Reconfiguration of Time-sensitive Networks at Runtime (), In Proceedings of the IFIP Networking Conference., IFIP, 2022.
BibTeX
- Enhancing Flexibility for Dynamic Time-Sensitive Network Configurations (), In Proceedings of the 3rd KuVS Fachgespräch on Network Softwarization, Universität Tübingen, 2022.
- Travel light: state shedding for efficient operator migration (), In Proceedings of the 16th ACM International Conference on Distributed and Event-Based Systems (DEBS'22), ACM press, 2022.
- FA2: Fast, Accurate Autoscaling for Serving Deep Learning Inference with SLA Guarantees (), In Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2022), IEEE, 2022.
BibTeX
- PANDA: performance prediction for parallel and dynamic stream processing (), In Proceedings of the 16th ACM International Conference on Distributed and Event-Based Systems, ACM press, 2022.
- Using Memristors for Energy Efficient Cognitive Network Functions (), In Symposium on Physics of Information in Matter [Poster Session], AMOLF, 2022.
- In-Network Computing Over Memristor-Based Cognitive Network Functions (), In Brain-Inspired Concepts and Materials for Information Processing (Brainspiration) Conference [Poster Session], University of Twente, 2022.
- Memristor-Based Cognitive Network Packet Processors (), In Neuromorphic Computing Netherlands (NCN 2022) Workshop [Abstracts, Talks and Posters], Radboud University, 2022.
- Memristor-Based Cognitive and Energy Efficient In-Network Processing (), In Workshop on Bio-Inspired Information Pathways [Abstracts and Posters], CRC-1461 Neurotronics, University of Kiel, 2022.
- TCEP: Transitions in Operator Placement to Adapt to Dynamic Network Environments. (), In In Journal of Computer and Systems Sciences (JCSS), Special Issue on Algorithmic Theory of Dynamic Networks and its Applications., Elsevier, volume 122, 2021.
- OpenBNG: Central office network functions on programmable data plane hardware (), In International Journal of Network Management, Wiley, volume 31, 2021.
- Leveraging Flexibility of Time-Sensitive Networks for dynamic Reconfigurability (), In Proceedings of IFIP Networking 2021, IFIP, 2021.
- Leveraging PIFO Queues for Scheduling in Time-Sensitive Networks (), In In the Proceedings of the IEEE International Symposium on Local and Metropolitan Area Networks (LANMAN 2021)., IEEE, 2021.
- P4-CoDel: Experiences on Programmable Data Plane Hardware (), In Proceedings of the IEEE International Conference on Communications (ICC 2021): Next-Generation Networking and Internet Symposium, IEEE, 2021.
- Towards QoE-Driven Optimization of Multi-Dimensional Content Streaming (), In Proceedings of the Conference on Networked Systems 2021 (NetSys 2021), European Association of Software Science and Technology, 2021.
- OpenBNG: Central office network functions on programmable data plane hardware (), In International Journal of Network Management, Wiley, 2020.
- Grußwort der Gastherausgeber zum Thema Fog Computing (), In Informatik Spektrum, Springer Science and Business Media LLC, volume 42, 2020.
- Operator as a Service: Stateful Serverless Complex Event Processing (), In Proceedings of the 2020 IEEE International Conference on Big Data, IEEE, 2020.
- Microbursts in Software and Hardware-based Traffic Load Generation (), In Proceedings of the IEEE/IFIP Network Operations and Management Symposium (NOMS), IEEE, 2020.
- Flexible Content-based Publish/Subscribe over Programmable Data Planes (), In Proceedings of the IEEE/IFIP Network Operations and Management Symposium (NOMS), IEEE, 2020.
- P4STA: High Performance Packet Timestamping with Programmable Packet Processors (), In Proceedings of the IEEE/IFIP Network Operations and Management Symposium (NOMS), IEEE, 2020.