Publications of Boris Koldehofe
- The Future is Analog: Energy-Efficient Cognitive Network Functions over Memristor-Based Analog Computations ( ), In Proceedings of the 22nd ACM SIGCOMM Workshop on Hot Topics in Networks (HotNets 2023), ACM, 2023.
- pCAM: Probabilistic Content Addressable Memory using Nb-doped SrTiO3 for Neuromorphic Systems ( ), In Proceedings of the Non-Volatile Memory Technology Symposium (NVMTS 2023), IEEE, 2023.
- Towards Pattern-Level Privacy Protection in Distributed Complex Event Processing ( ), In The 17th ACM International Conference on Distributed and Event-Based Systems (DEBS 2023), ACM press, 2023.
In event processing systems, detected event patterns can reveal privacy-sensitive information. In this paper, we propose and discuss how to integrate pattern-level privacy protection in event-based systems. Compared to state-of-the-art approaches, we aim to enforce privacy independent of the particularities of specific operators. We accomplish this by supporting the flexible integration of multiple obfuscation techniques and studying deployment strategies for privacy-enforcing mechanisms. Moreover, we share ideas on how to model the adversary’s knowledge to better select appropriate obfuscation techniques for the discussed deployment strategies. Initial results indicate that flexibly choosing obfuscation techniques and deployment strategies is essential to conceal privacy-sensitive event patterns accurately.
- AQuA-CEP: Adaptive Quality-Aware Complex Event Processing in the Internet of Things ( ), In Proceedings of the 17th ACM International Conference on Distributed and Event-Based Systems (DEBS 2023), ACM press, 2023.
Sensory data profoundly influences the quality of detected events in a distributed complex event processing system (DCEP). Since each sensor’s status is unstable at runtime, a single sensing assignment is often insufficient to fulfill the consumer’s quality requirements. In this paper, we study in the context of AQuA-CEP the problem of dynamic quality monitoring and adaptation of complex event processing by active integration of suitable data sources. To support this, in AQuA-CEP, queries to detect complex events are supplemented with consumer-definable quality policies that are evaluated and used to autonomously select (or even configure) suitable data sources of the sensing infrastructure. In addition, we studied different forms of expressing quality policies and analyzed how it affects the quality monitoring process. Various modes of evaluating and applying quality-related adaptations and their impacts on correlation efficiency are addressed, too. We assessed the performance of AQuA-CEP in IoT scenarios by utilizing the notion of the quality policy alongside the query processing adaptation using knowledge derived from quality monitoring. The results show that AQuA-CEP can improve the performance of DCEP systems in terms of the quality of results while fulfilling the consumer’s quality requirements. Quality-based adaptation can also increase the network’s lifetime by optimizing the sensor’s energy consumption due to efficient data source selection.
- Memristor-based Probabilistic Content Addressable Memory for Cognitive Network Functions ( ), In Neuromorphic Computing Netherlands (NCN 2023) Workshop [Posters], 2023.
- On Memristors for Enabling Energy Efficient and Enhanced Cognitive Network Functions ( ), In IEEE Access, IEEE, volume 10, 2022.
The high performance requirements of nowadays computer networks are limiting their ability to support important requirements of the future. Two important properties essential in assuring cost-efficient computer networks and supporting new challenging network scenarios are operating energy efficient and supporting cognitive computational models. These requirements are hard to fulfill without challenging the current architecture behind network packet processing elements such as routers and switches. Notably, these are currently dominated by the use of traditional transistor-based components. In this article, we contribute with an in-depth analysis of alternative architectural design decisions to improve the energy footprint and computational capabilities of future network packet processors by shifting from transistor-based components to a novel component named Memristor . A memristor is a computational component characterized by non-volatile operations on a physical state, mostly represented in form of (electrical) resistance. Its state can be read or altered by input signals, e.g. electrical pulses, where the future state always depends on the past state. Unlike in traditional von Neumann architectures, the principles behind memristors impose that memory operations and computations are inherently colocated. In combination with the non-volatility, this allows to build memristors at nanoscale size and significantly reduce the energy consumption. At the same time, memristors appear to be highly suitable to model cognitive functionality due to the state dependence transitions in the memristor. In cognitive architectures, our survey contributes to the study of memristor-based Ternary Content Addressable Memory (TCAM) used for storage of cognitive rules inside packet processors. Moreover, we analyze the memristor-based novel cognitive computational architectures built upon self-learning capabilities by harnessing from non-volatility and state-based response of memristors (including reconfigurable architectures, reservoir computation architectures, neural network architectures and neuromorphic computing architectures).
- Network Testing Utilizing ProgrammableNetworking Hardware. ( ), In IEEE Communications Magazine, IEEE, 2022.
- Towards adaptive quality-aware Complex Event Processing in the Internet of Things ( ), In Proceedings of the 18th International Conference on Mobility, Sensing and Networking (MSN 2022), IEEE, 2022.
This paper investigates how to complement Complex Event Processing (CEP) with dynamic quality monitoring mechanisms and support the dynamic integration of suitable sensory data sources. In the proposed approach, queries to detect complex events are annotated with consumer-definable quality policies that are evaluated and used to autonomously assign (or even configure) suitable data sources of the sensing infrastructure. We present and study different forms of expressing quality policies and explore how they affect the process of quality monitoring including different modes of assessing and applying quality-related adaptations. A performance study in an IoT scenario shows that the proposed mechanisms in supporting quality policy monitoring and adaptively selecting suitable data sources succeed in enhancing the acquired quality of results while fulfilling consumers' quality requirements. We show that the quality-based selection of sensor sources also extends the network's lifetime by optimizing the data sources' energy consumption.
- TCAmMCogniGron: Energy Efficient Memristor-Based TCAM for Match-Action Processing ( ), In Proceedings of the 7th International Conference on Rebooting Computing (ICRC 2022), IEEE, 2022.
The Internet relies heavily on programmable match-action processors for matching network packets against locally available network rules and taking actions, such as forwarding and modification of network packets. This match-action process must be performed at high speed, i.e., commonly within one clock cycle, using a specialized memory unit called Ternary Content Addressable Memory (TCAM). Building on transistor-based CMOS designs, state-of-the-art TCAM architectures have high energy consumption and lack resilient designs for incorporating novel technologies for performing appropriate actions. In this article, we motivate the use of a novel fundamental component, the ‘Memristor’, for the development of TCAM architecture for match-action processing. Memristors can provide energy efficiency, non-volatility and better resource density as compared to transistors. We have proposed a novel memristor-based TCAM architecture called TCAmMCogniGron, built upon the voltage divider principle and requiring only two memristors and five transistors for storage and search operations compared to sixteen transistors in the traditional TCAM architecture. We analyzed its performance over an experimental data set of Nb-doped SrTiO3-based memristor. The analysis of TCAmMCogniGron showed promising power consumption statistics of 16 uW and 1 uW for match and mismatch operations along with twice the improvement in resources density as compared to the traditional architectures.
- Towards Energy Efficient Memristor-based TCAM for Match-Action Processing ( ), In Proceedings of the 13th International Green and Sustainable Computing Conference (IGSC 2022), IEEE, 2022.
Match-action processors play a crucial role of communicating end-users in the Internet by computing network paths and enforcing administrator policies. The computation process uses a specialized memory called Ternary Content Addressable Memory (TCAM) to store processing rules and use header information of network packets to perform a match within a single clock cycle. Currently, TCAM memories consume huge amounts of energy resources due to the use of traditional transistor-based CMOS technology. In this article, we motivate the use of a novel component, the memristor, for the development of a TCAM architecture. Memristors can provide energy efficiency, non-volatility, and better resource density as compared to transistors. We have proposed a novel memristor-based TCAM architecture built upon the voltage divider principle for energy efficient match-action processing. Moreover, we have tested the performance of the memristor-based TCAM architecture using the experimental data of a novel Nb-doped SrTiO3 memristor. Energy analysis of the proposed TCAM architecture for given memristor shows promising power consumption statistics of 16 μW for a match operation and 1 μW for a mismatch operation.
- Window-based Parallel Operator Execution with In-Network Computing: Proceedings ( ), In Proceedings of the 16th ACM International Conference on Distributed and Event-based Systems (DEBS '22), ACM New York, NY, USA, 2022.
Data parallel processing is a key concept to increase the scalability and elasticity in event streaming systems. Often data parallelism is accomplished in a splitter-merger architecture where the splitter divides incoming streams into partitions and forwards them to parallel operator instances. The splitter performance is a limiting factor to the system throughput and the parallelization degree.This work studies how to leverage novel methods of in-network computing to accelerate the splitter functionality by implementing it as an in-network function. While dedicated hardware for in-network computing has a high potential to enhance the splitter performance, in-network programming models like the P4 language are also highly limited in their expressiveness to support corresponding parallelization models. We propose P4SS which supports overlapping and non-overlapping count-based windows for multiple independent data streams and parallelizes them to a dynamically configurable number of operator instances. We validate in the context of a prototypical implementation our splitting strategy and its scalability in terms of switch resource consumption.
Keywords: Data Parallelism, In-network Computing, Load Balancing, Complex Event Processing (CEP), P4 Language, Data Plane Programming
- Enhancing Flexibility for Dynamic Time-Sensitive Network Configurations ( ), In Proceedings of the 3rd KuVS Fachgespräch on Network Softwarization, Universität Tübingen, 2022.
- On the Incremental Reconfiguration of Time-sensitive Networks at Runtime ( ), In Proceedings of the IFIP Networking Conference., IFIP, 2022.
- Travel light: state shedding for efficient operator migration ( ), In Proceedings of the 16th ACM International Conference on Distributed and Event-Based Systems (DEBS'22), ACM press, 2022.
- FA2: Fast, Accurate Autoscaling for Serving Deep Learning Inference with SLA Guarantees ( ), In Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2022), IEEE, 2022.
- PANDA: performance prediction for parallel and dynamic stream processing ( ), In Proceedings of the 16th ACM International Conference on Distributed and Event-Based Systems, ACM press, 2022.
- Using Memristors for Energy Efficient Cognitive Network Functions ( ), In Symposium on Physics of Information in Matter [Poster Session], AMOLF, 2022.
- In-Network Computing Over Memristor-Based Cognitive Network Functions ( ), In Brain-Inspired Concepts and Materials for Information Processing (Brainspiration) Conference [Poster Session], University of Twente, 2022.
- Memristor-Based Cognitive Network Packet Processors ( ), In Neuromorphic Computing Netherlands (NCN 2022) Workshop [Abstracts, Talks and Posters], Radboud University, 2022.
- Memristor-Based Cognitive and Energy Efficient In-Network Processing ( ), In Workshop on Bio-Inspired Information Pathways [Abstracts and Posters], CRC-1461 Neurotronics, University of Kiel, 2022.
- TCEP: Transitions in Operator Placement to Adapt to Dynamic Network Environments. ( ), In In Journal of Computer and Systems Sciences (JCSS), Special Issue on Algorithmic Theory of Dynamic Networks and its Applications., Elsevier, volume 122, 2021.
- OpenBNG: Central office network functions on programmable data plane hardware ( ), In International Journal of Network Management, Wiley, volume 31, 2021.
- Leveraging Flexibility of Time-Sensitive Networks for dynamic Reconfigurability ( ), In Proceedings of IFIP Networking 2021, IFIP, 2021.
- Leveraging PIFO Queues for Scheduling in Time-Sensitive Networks ( ), In In the Proceedings of the IEEE International Symposium on Local and Metropolitan Area Networks (LANMAN 2021)., IEEE, 2021.
- P4-CoDel: Experiences on Programmable Data Plane Hardware ( ), In Proceedings of the IEEE International Conference on Communications (ICC 2021): Next-Generation Networking and Internet Symposium, IEEE, 2021.
- Towards QoE-Driven Optimization of Multi-Dimensional Content Streaming ( ), In Proceedings of the Conference on Networked Systems 2021 (NetSys 2021), European Association of Software Science and Technology, 2021.
- OpenBNG: Central office network functions on programmable data plane hardware ( ), In International Journal of Network Management, Wiley, 2020.
- Grußwort der Gastherausgeber zum Thema Fog Computing ( ), In Informatik Spektrum, Springer Science and Business Media LLC, volume 42, 2020.
- Operator as a Service: Stateful Serverless Complex Event Processing ( ), In Proceedings of the 2020 IEEE International Conference on Big Data, IEEE, 2020.
- Microbursts in Software and Hardware-based Traffic Load Generation ( ), In Proceedings of the IEEE/IFIP Network Operations and Management Symposium (NOMS), IEEE, 2020.
- Flexible Content-based Publish/Subscribe over Programmable Data Planes ( ), In Proceedings of the IEEE/IFIP Network Operations and Management Symposium (NOMS), IEEE, 2020.
- P4STA: High Performance Packet Timestamping with Programmable Packet Processors ( ), In Proceedings of the IEEE/IFIP Network Operations and Management Symposium (NOMS), IEEE, 2020.